1. Field of the Invention
The present invention relates to an automatic wiring technique of semi-custom semiconductor integrated circuit devices and, more particularly, to the method and device for designing automatic wiring patterns which are formed with the assistance of a computer in accordance with a predetermined routing scheme between function circuit blocks which are selected to realize a desired LSI circuit function on a chip substrate.
2. Description of the Related Art
Unlike a full-custom LSI (large scale integrated circuit), the importance of the semi-custom LSI has been increased to the semiconductor manufactures in recent years for reasons of the short developing period of time, superiority in flexibility for realizing various use of LSI, and relatively low cost of products. A building-block type or general-cell type LSI is one of typical semi-custom LSIs wherein selected function blocks (also called "modules") such as a CPU (central processing unit), an ALU (arithmetic logic unit), a PLA (programmable logic array), a RAM (random access memory), a ROM (read only memory), or polycell unit are dispersively arranged on a semiconductor chip substrate. An appropriate wiring pattern forming of line segments extending in the row and column directions (X and Y directions) of the the substrate is added into a wiring region defined between these function blocks to surround these function blocks, and an electrical wiring is provided between the function blocks, thereby providing a desired LSI function.
Normally, according to this kind of semi-custom LSI, a computer-assisted routing design method is used to determine a wiring pattern, for the electrical connection between the above blocks. For example, in a case when the channel wiring method is used for designing the wiring pattern, the wiring region of the substrate surface is divided into sub-wiring regions (known as "channels" among one skilled in the art) to correspond to the function blocks arranged on the substrate. In general, each function block has a rectangular plane shape, each channel is also defined to have a rectangular plane shape to be adjacent to the corresponding function block. Therefore, the channel regions, which are adjacent to each other on the substrate, are interconnected to each other via a linear boundary line. The number of wires (number of tracks) running in the directions of the row and column, which can be formed in each channel, is determined in accordance with an area of each channel. In order to satisfy the condition of the number of said tracks, and minimize the length of each wire at the same time, the wiring patterns, which is necessary to realize a desired LSI function, are respectively determined every channel through a rough wiring path (global wiring path) determination step and a detailed wiring process step.
For example, the wiring pattern design of the corresponding channel between a certain function block and the function blocks associated therewith is performed in such a manner that the terminals of the function blocks are correctly connected to the corresponding terminals of the opponent function blocks, respectively. In this case, in consideration of the condition of the allowable number of tracks, it is common that each connection line is formed of line segments running in the directions of the row and column. Firstly, a global wiring path is determined, and a detailed wiring process is performed. In a boundary line between the channel to be processed and the channel adjacent thereto, virtual or pseudo terminals (generally called "channel boundary terminals" or "channel boundary pins") are provided in accordance with the connection requirement between these function blocks. If the determination of the wiring pattern of one channel is completed, the wiring patterns of the other channel adjacent thereto are determined in the same manner.
According to the conventional automatic wiring design method, however, there is a problem that the resultant integration density of LSI cannot be expected to be highly improved as required. This is because the redundant crossing of wiring lines is generated in the vicinity of the boundary between the adjacent channels. Such a redundant wire crossing leads to generation of unnecessary spaces in the channels; the channel width is undesirably increased.